Posted by Ahmed Abasiry The address reference problem is rectified by removing the "- relax" switch in the linker script line. With the "-relax" option, it referneces to a wrong ISR address. --Previous Message--
![]()
on September 3, 2002, 17:07:36
Found a solution, it worked fine but I am not sure if there are any catches:
Does anybody has any suggestions?
Thanks and Regards
: Hi All,
: I have written a code for the 2144F
: EVB which uses interrupts.. All
: O.K.
: Now, I moved to a prototype board
: (code in the 2144F flash) all O.K.
: except my interrupts are
: misbehaving!! I only write
: assembly, no "C". I have
: troubleshot my code in the
: "Srec" file and found
: the problem, however, I don't have
: a solution yet. Here's the
: problem: 1- The interrupt routine
: is called "ISR" and is
: located at 0x06B4 in the flash ROM
: 2- The vector table entry to point to
: the ISR is written as : .data.l
: ISR
: 3- From the Srec file, the ISR vector
: is in the correct place in the
: vector table. However, the address
: in the vector table points to
: 0x06B6 rather than 0x06B4 where
: the ISR is physically located.
: 4- To confirm, I have manually
: changed the address pointer in the
: vector table to the correct ISR
: address (0x06B4) and everything
: worked smooth!!!
: 5- The processor is running in mode 2
: Advance expanded.
: 6- The ISR is loacted in one file and
: the vector table is located in
: another. Both files are assembled
: and then linked together.
: 7- I am using the Cygnus GNU tools
: that came with the EVB. I
: personally suspecting some switch
: or so in the assembly command
: line. I am not really great with
: GNU stuff..
: 8- The assembly/link batch file
: reads:
: as init.s -o init.o
: as led.s -o led.o
: ld init.o led.o -relax -Map led.map
: -T link.cmd -o led.srec
: I apprecaite any help and I can give
: any more details if needed. This
: thing is getting on my nerves!!
: Thanks in advance!!
:
:
:
Message Thread:
![]()
« Back to thread
Evaluation Kit Support
Renesas Evaluation Boards are intended for evaluation of Renesas microprocessors only, not as development tools.